Last revised 12-12-05.
A set top box that is a game player, web browser, and MPEG decoder would provide the base for high volume sales. A DVD drive could provide the games and movies for MPEG decoding.
Low end computers could evolve as follows.
Start with a chip that implements a Java VM via compiled emulation, and also a DVD drive.
With embedded DRAM technology, use say 80% of the chip for embedded DRAM, either as cache and/or DRAM memory. Use the rest of the chip for processors and SRAM cache. Simulation would be needed to size the caches and processors.
Note that by using multiple processors, a chip defect could knock out a processor, but not the whole chip as in a single processor chip.
Using the Java VM, or some universal VM that includes Java, allows the ISA to evolve over time, and to be tuned to the changes in processor usage and silicon technology.
Since there is a need to support Java for Java applet execution and a need to support multithreading in order to use the multiple processors effectively, it makes sense to use Java with it's support of multithreading as the software interface for the chip. Also, there'll likely be numerous Java applications written to run on network computers, and these could be run on the chip.
The arithmetic units in each processor would be tuned to the problem of supporting graphics operations while also including the basic arithmetic operations needed to support the Java VM.
Before a user gets a HD, a user's Internet Service Provider could provide limited file storage.
If the chip is designed to be expandable to multiple chip configurations, then the system could be expanded by adding memory chips. Also, the compute power could be expanded by adding more multiple processor chips. Using these chips would be a cheap way to get substantial compute power.
Most current uniprocessor software would run fast enough on a single processor of a multiple processor chip. (It seems that for most current software except graphics, a 200Mhz Pentium is fast enough for most consumers.)
Until now, the processor and x86 coded applications have been the dog and graphics support the tail. Soon, graphics will be the computationally demanding task and x86 coded applications will be easily handled by a single processor. The tail will have become the dog.
As the clock rate continues to increase faster than the maximum DRAM cycle rate, superscalar uniprocessors will wait for memory more of the time. A modestly superscalar design will be more in balance with the achievable memory hierarchy performance, and the layout should be easier.
Also, even with a modestly superscalar design, continuing increases in the clock rate relative to the maximum DRAM cycle rate will make multithreading attractive, i.e. a more cost effective way to higher performance than just increasing the cache sizes to get higher hit rates in order to get higher performance. However, 2-4 threads would seem to be an upper limit, i.e. once you're up to ~4 threads, it'd seem better to include another processor.
Note that there are halfway solutions, e.g. 2 threads for each of 2 processors, but then have the 2 processors share a floating point unit.
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